Survey on mining signal temporal logic specifications

On Signal Temporal Logic

Refining Interval Temporal Logic Specifications

Interval Temporal Logic (ITL) was designed as a tool for the specification and verification of systems. The development of an executable subset of ITL, namely Tempura, was an important step in the use of temporal logic as it enables the developer to check, debug and simulate the design. However, a design methodology is missing that transforms an abstract ITL specification to an executable (conc...

Robustness of Temporal Logic Specifications

In this paper, we consider the robust interpretation of Metric Temporal Logic (MTL)formulas over signals that take values in metric spaces. For such signals, whichare generated by systems whose states are equipped with nontrivial metrics, forexample continuous or hybrid, robustness is not only natural, but also a criticalmeasure of system performance. Thus, we propose multi-valu...

Mining Temporal Specifications for Error Detection

Specifications are necessary in order to find software bugs using program verification tools. This paper presents a novel automatic specification mining algorithm that uses information about error handling to learn temporal safety rules. Our algorithm is based on the observation that programs often make mistakes along exceptional control-flow paths, even when they behave correctly on normal exe...

Runtime Analysis of Linear Temporal Logic Specifications

This report presents an approach to checking a running program against its Linear Temporal Logic (LTL) specifications. LTL is a widely used logic for expressing properties of programs viewed as sets of executions. Our approach consists of translating LTL formulae to finite-state automata, which are used as observers of the program behavior. The translation algorithm we propose modifies standard...